The invention generally relates to signal processing, and more particularly, to analog to digital conversion using sigma-delta modulation.
Sigma-delta (xcexa3-xcex94) modulation is a widely used and thoroughly investigated technique for converting an analog signal into a high-frequency digital sequence. See, for example, xe2x80x9cOversampling Delta-Sigma Data Converters,xe2x80x9d eds. J. C. Candy and G. C. Temes, IEEE Press, 1992, and xe2x80x9cDelta-Sigma Data Converters,xe2x80x9d eds. S. R. Northworthy, R. Schreier, G. C. Temes, IEEE Press, 1997, both of which are hereby incorporated herein by reference.
In xcexa3-xcex94 modulation, a low-resolution quantizer is incorporated within a feedback loop configuration in which the sampling frequency is much higher than the Nyquist frequency of the input signal (i.e., much higher than twice the maximum input frequency). In addition, the noise energy introduced in the quantizer is shaped towards higher frequencies according to a so called xe2x80x9cnoise transfer-functionxe2x80x9d NTF(z), and the signal passes the modulator more or less unchanged according to a so called xe2x80x9csignal-transfer-functionxe2x80x9d STF(z).
FIG. 1(a) depicts a simple first order xcexa3-xcex94 modulator for a discrete time system having a subtraction stage 101, an accumulator 102 (including an integrator adder 103 and a delay line 104), and a one-bit quantizer 105. In normal operation, an input signal x(n) within the range [xe2x88x92axe2x89xa6x(n)xe2x89xa6a] is converted to the binary output sequence ya(n)xcex5xc2x1a. The quantizer 105 produces a+1 for a positive input and a xe2x88x921 for a negative input. The output from the quantizer 105 is fedback and subtracted from the input signal x(n) by the subtraction stage 101. Thus, the output of the subtraction stage 101 will represent the difference between the input signal x(n) and the quantizer output signal ya(n). As can be seen from FIG. 1(a), the output of the accumulator 102 represents the sum of its previous input and its previous output. Thus, depending on whether the output of the accumulator 102 is positive or negative, the one-bit quantizer 105 outputs a+1 or a xe2x88x921 as appropriate.
As can be seen in FIG. 1(b), if the quantizer 105 is replaced by an adder 106 and a noise source 107 the basic relationship between the z-transforms of system input x(n), quantizer noise xcex3a(n); and the two-level output sequence y(n) is:
Ya(z)=zxe2x88x921X(z)+(1xe2x88x92zxe2x88x921)xcex93a(z), 
where index xe2x80x9caxe2x80x9d denotes the amplitude of sequence ya(n), i.e., ya(n) xcex5xc2x1a. The signal transfer function and noise transfer function can be identified as STF(z)=zxe2x88x921 and NTF(z)=(1xe2x88x92zxe2x88x921), respectively.
For higher order modulators, the signal transfer unction remains unchanged, and the noise transfer function becomes NTF(z)=(1xe2x88x92zxe2x88x921)k, where k denotes the order of the modulator. The signal-transfer function STF(z)=zxe2x88x921 means that the input signal is represented in the output sequence ya(n), delayed by one sampling clock period. This transfer function does not contain any bandwidth limitations of the input signal. Any input signal x(n) within the range [xe2x88x92a+a] can be processed by the xcexa3-xcex94 modulator, including discontinuous signals with step-like transitions. For the modulator depicted in FIG. 1, this can easily be demonstrated, if it is regarded as a linear (non-adaptive) delta modulator, whose input is the accumulated input x(n). If the input is within the range [xe2x88x92axe2x89xa6x(n)xe2x89xa6a], the magnitude of the maximum slope of the accumulated sequence x(n) is a a/T (with T as sampling period). Thus, the delta modulator can always track its input, and so called xe2x80x9cslope-overload conditionsxe2x80x9d cannot occur.
In most applications, this basic xcexa3-xcex94 feature is not exploited. In order to cut off the shaped out-of-band-quantization noise, the xcexa3-xcex94 output sequence ya(n) is low-pass filtered (usually by means of linear filters), thereby removing also the spectral components of x(n) outside the base band.
An adaptive sigma delta modulator is provided. The adaptive sigma delta modulator includes an input stage, a sigma delta modulator, an adaptation stage, and an output stage. The input stage produces a difference signal representing the difference between an analog input signal in a first amplitude range and an adaptive feedback signal. The sigma delta modulator produces an intermediate digital output sequence in a reduced second amplitude range representative of the difference signal. The adaptation stage produces the adaptive feedback signal such that the amplitude of the adaptive signal keeps the difference signal within the reduced second range. The output stage produces a final digital output sequence which is the sum of the intermediate digital output sequence and a delayed adaptive feedback signal. The final digital output sequence has an amplitude in the first range and is a digital representation of the analog input. In one embodiment, the adaptive feedback signal is delayed by one clock period. The adaptive feedback signal may include an estimate of the instantaneous input signal and the sign of a quantizer output signal multiplied by an amplitude smaller than the amplitude of the input signal. In a preferred embodiment, the sigma delta modulator is of the first order.
In a further embodiment, an adaptive sigma delta modulator is provided wherein the input stage includes a plurality of capacitors connected in parallel and a switch control logic device for charging and discharging the capacitors.
A method for adapting sigma delta modulation is also provided. A difference signal representing the difference between an analog input signal in a first amplitude range and an adaptive feedback signal is produced. An intermediate digital signal output sequence in a reduced second amplitude range representative of the difference signal is also produced. The adaptive feedback signal is produced and the amplitude of the adaptive feedback signal keeps the difference signal within the reduced second range. Lastly, a final digital output sequence is produced. The final digital output sequence is the sum of the intermediate digital output sequence and a delayed adaptive feedback signal representative of the adaptive feedback signal. The final digital output sequence has an amplitude in the first range.